The present invention generally relates to integrated circuits, and, more particularly, to an integrated circuit with multiplexed input/output (I/O) pads.
Integrated circuits (ICs) integrate various digital as well as analog circuits on a single chip for performing various functions. Today's sophisticated ICs may include multiple power domains that can be switched on and off independently in order to reduce power consumption. With advancements in semiconductor technology, the number of circuits on an IC also is increasing. Increased amounts of circuitry typically requires additional external connections or input/output (I/O) pads. However, the number of input/output (I/O) pads that can be included in the IC is limited by its size/area.
One known technique to overcome the limitation on the number of I/O pads is to multiplex the I/O pads. In this regard, the IC includes multiplexers corresponding to the I/O pads. For example, an IC may include a first multiplexer corresponding to a first I/O pad, where the first multiplexer and the first I/O pad are located in a first power domain. The first multiplexer receives signals from various power domains including the first power domain to be multiplexed and provided to a peripheral device connected to the first I/O pad based on a select signal.
When power domains other than the first power domain are switched off, the first multiplexer still operates to provide a signal from the first power domain to the first I/O pad. Thus, components of the first multiplexer that receive signals from the power domains other than the first power domain are not used and hence, lead to unnecessary power consumption. Further, the first multiplexer receives signals from various power domains, leading to routing congestion and an increase in the number of isolation circuits, thereby leading to an increase in the IC area.
Therefore, it would be advantageous to have I/O multiplexing units that facilitates reduced power consumption and reduced routing congestion.